Espressif Systems /ESP32-P4 /H264_DMA /IN_INT_RAW_CH5

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as IN_INT_RAW_CH5

Description

RX CH5 interrupt raw register

Fields

IN_DONE_CH5_INT_RAW	The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been transmitted to peripherals for Rx channel 1.
IN_SUC_EOF_CH5_INT_RAW	The raw interrupt bit turns to high level when the last data pointed by one inlink descriptor has been received and no data error is detected for Rx channel 1.
INFIFO_OVF_L1_CH5_INT_RAW	This raw interrupt bit turns to high level when fifo of Rx channel is overflow.
INFIFO_UDF_L1_CH5_INT_RAW	This raw interrupt bit turns to high level when fifo of Rx channel is underflow.
FETCH_MB_COL_CNT_OVF_CH5_INT_RAW	This raw interrupt bit turns to high level when fifo of Rx channel is underflow.

Links

() ()